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MCP6S21/2/6/8
6.0
6.1
APPLICATIONS INFORMATION
Changing External Reference
Voltage
For C L ≥ 100 pF, a good estimate for R ISO is 50 ? . This
value can be fine-tuned on the bench. Adjust R ISO so
that the step response overshoot and frequency
response peaking are acceptable at all gains.
Figure 6-1 shows a MCP6S21 with the V REF pin at
2.5V and V DD = 5.0V. This allows the PGA to amplify
signals centered on 2.5V, instead of ground-referenced
signals. The voltage reference MCP1525 is buffered by
a MCP6021, which gives a low output impedance ref-
erence voltage from DC to high frequencies. The
source driving the V REF pin should have an output
impedance of ≤ 0.1 ? to maintain reasonable gain
accuracy.
6.3 Layout Considerations
Good PC board layout techniques will help achieve the
performance shown in the Electrical Characteristics
and Typical Performance Curves. It will also help
minimize EMC (Electro-Magnetic Compatibility) issues.
6.3.1 COMPONENT PLACEMENT
Separate circuit functions; digital from analog, low
speed from high speed, and low power from high
V DD
V DD
power, as this will reduce crosstalk.
Keep sensitive traces short and straight, separating
them from interfering components and traces. This is
MCP1525
2.5V
REF
V IN
V DD
MCP6S21
V REF
V OUT
especially important for high frequency (low rise time)
signals.
Use a 0.1 μF supply bypass capacitor within 0.1 inch
(2.5 mm) of the V DD pin. It must connect directly to the
ground plane. A multi-layer ceramic chip capacitor, or
high-frequency equivalent, works best.
MCP6021
6.3.2
SIGNAL COUPLING
1 μF
The input pins of the MCP6S21/2/6/8 family of opera-
tional amplifiers (op amps) are high-impedance. This
makes them especially susceptible to capacitively-cou-
FIGURE 6-1:
Reference Voltage.
PGA with Different External
pled noise. Using a ground plane helps reduce this
problem.
6.2
Capacitive Load and Stability
When noise is capacitively-coupled, the ground plane
provides additional shunt capacitance to ground. When
Large capacitive loads can cause both stability prob-
lems and reduced bandwidth for the MCP6S21/2/6/8
family of PGAs (Figure 2-17 and Figure 2-18). This
happens because a large load capacitance decreases
the internal amplifier ’s phase margin and bandwidth.
If the PGA drives a large capacitive load, the circuit in
Figure 6-2 can be used. A small series resistor (R ISO )
at the V OUT improves the phase margin by making the
load resistive at high frequencies. It will not, however,
improve the bandwidth.
noise is magnetically coupled, the ground plane
reduces the mutual inductance between traces.
Increasing the separation between traces makes a
significant difference.
Changing the direction of one of the traces can also
reduce magnetic coupling. It may help to locate guard
traces next to the victim trace. They should be on both
sides of the victim trace and be as close as possible.
Connect the guard traces to the ground plane at both
ends, and in the middle, of long traces.
6.3.3
HIGH FREQUENCY ISSUES
V IN
MCP6S2X
R ISO
V OUT
Because the MCP6S21/2/6/8 PGAs reach unity gain
near 64 MHz when G = 16 and 32, it is important to use
good PCB layout techniques. Any parasitic coupling at
high frequency might cause undesired peaking. Filter-
C L
ing high frequency signals (i.e., fast edge rates) can
help. To minimize high frequency problems:
?
Use complete ground and power planes
FIGURE 6-2:
Capacitive Loads.
PGA Circuit for Large
?
?
?
Use HF, surface mount components
Provide clean supply voltages and bypassing
Keep traces short and straight
? 2003 Microchip Technology Inc.
?
Try a linear power supply (e.g., an LDO)
DS21117A-page 25
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